MRAM devices have become the subject of increasing interest, in view of the discovery of magnetic tunnel junctions having a strong magnetoresistance at ambient temperatures. MRAM devices offer a number of benefits, such as faster speed of writing and reading, non-volatility, and insensitivity to ionizing radiations. Consequently, MRAM devices are increasingly replacing memory devices that are based on a charge state of a capacitor, such as dynamic random access memory devices and flash memory devices.
In a conventional implementation, a MRAM device includes an array of MRAM cells, each of which includes a magnetic tunnel junction formed of a pair of ferromagnetic layers separated by a thin insulating layer. One ferromagnetic layer, the so-called reference layer, is characterized by a magnetization with a fixed direction, and the other ferromagnetic layer, the so-called storage layer, is characterized by a magnetization with a direction that is varied upon writing of the device, such as by applying a magnetic field. When the respective magnetizations of the reference layer and the storage layer are antiparallel, a resistance of the magnetic tunnel junction is high, namely having a resistance value Rmax corresponding to a high logic state “1”. On the other hand, when the respective magnetizations are parallel, the resistance of the magnetic tunnel junction is low, namely having a resistance value Rmin corresponding to a low logic state “0”. A logic state of a MRAM cell is read by comparing its resistance value to a reference resistance value Rref, which represents an in-between resistance value between that of the high logic state “1” and the low logic state “0”.
In a conventional MRAM cell that is implemented for thermally assisted switching (“TAS”), a storage layer is typically exchange biased by an antiferromagnetic layer, which is adjacent to the storage layer within a magnetic tunnel junction and is characterized by a threshold temperature. Below the threshold temperature, a magnetization of the storage layer is pinned by the exchange bias, thereby inhibiting writing of the storage layer. Writing is carried out by passing a current through the magnetic tunnel junction, thereby heating the magnetic tunnel junction above the threshold temperature and unpinning the magnetization of the storage layer. The magnetic tunnel junction is then cooled to below the threshold temperature with a magnetic field applied, such that the magnetization of the storage layer is “frozen” in the written direction.
While offering a number of benefits, a conventional TAS-type MRAM device suffers from certain deficiencies. Specifically, a current that is passed through a magnetic tunnel junction should be of sufficient magnitude to heat the magnetic tunnel junction above a threshold temperature, which can be about 120° C. or higher. However, passing a current of such magnitude through the magnetic tunnel junction can create stresses on an insulating layer within the magnetic tunnel junction, and repeated writing operations can degrade the insulating layer and reduce an operational life of the MRAM device.
It is against this background that a need arose to develop the MRAM devices and related methods described herein.